BIPOLAR JUNCTION TRANSISTOR:

  Placing two pn junctions together can make a bipolar transistor; it consists of three regions namely base, emitter and collector :

  1.Base (central region):

It is the thin, lightly doped region, which has majority charge carriers of opposite polarity to those in the surrounding material.

2.Emitter (outer region):

Under the proper operating conditions the emitter will inject majority carriers into the base region and as the base is very thin most of them would reach the collector region. Emitter is highly doped to reduce the resistance.

3.Collector (outer region):

It is the region, which is lightly doped, compared to emitter to reduce the junction capacitance of the collector-base junction.

  Bipolar transistor consists of two types:

1.NPN:

Electrons are the majority carriers and silicon is preferred for these devices.

2.PnP:

Holes are the majority carriers and germanium is preferred for these devices.

  The figure 1 depict the circuit symbols for NPN and PnP transistors:

Fig (a) shows an NPN bipolar transistor with the arrow indicating the direction of i_B.

Fig (b) shows a PnP bipolar transistor with the arrow indicating the direction of i_C.

  A Bipolar transistor is a little like a relay as it uses a small current to control a larger current.

  TRANSISTOR OPERATION (NPN):(see figure 2)

If collector, emitter and base of an NPN transistor are connected as shown in fig. (a), it results in the formation of two depleted regions around the base due to the diffusion process. The diffusion of the negative carriers into the base and positive carriers out of the base results in relative electric potential as shown in fig (b).

  Consider the figure 3.

  Fig (a) shows a transistor biased for normal operation. Here base terminal is slightly positive with respect to emitter (0.6 v for silicon) and to collector by several volts. The transistor acts to make i_C>>i_B when properly biased. The depletion region at the reverse-biased base-collector junction grows and supports the electric potential change as in fig (b).

  The behaviour of transistor is given by the characteristic curves as illustrated in the figure 4.Each curve starts from zero in a non-linear fashion, then rises smoothly and after reaching the knee enter a region of constant i_C.the flat region shows the condition where the depletion region at base-emitter junction disappears .to be used as a linear amplifier, transistor should be operated exclusively in the flat region, where i_C is determined by i_B.

                                 i_C=bi_B=h_FEi_B

  b®dc current gain, h_FE® static forward current transfer ratio.

  b Can be defined as:

                b=a/1-a

  The transistor is a current amplifying device considering the above definition and the typical values given below.

                     (a=0.99,b=99)

  BASIC CIRCUIT CONFIGURATIONS:

For any transistor circuit design we must supply a dc bias current and voltage to operate in the linear region of the characteristic curve. The values of i_B,i_C,v_BE,v_CE define the dc operating point. Also we should obtain proper ac operation.

                                    The transistor is used to form a four terminal circuit. Large current changes are produced in the collector and emitter due to small variations in voltage in the collector-emitter junction, whereas there is no effect on the base due to small changes in collector-emitter voltage. Hence the base is always a part of input to a four terminal network. The three common configurations are CE, CB and CC. (see figure 5) 

COMMON EMITTER AMPLIFIER:(see figure 6)

  The fig (a) shows a circuit of common emitter amplifier utilizing the simplest biasing method. Since the power supply voltage v_CC is a constant it is an AC ground, which is indistinguishable from normal ground of the circuit. Accordingly R_B and R_C can be relocated to the common ground line as in fig (b) and we would obtain the AC equivalent circuit of fig (a). As the transistor symbol is ideal and h_ie is shown explicitly as the input impedance, therefore i_s¹i_b. This gives us the approximate AC model of the common emitter amplifier.

               We can use the AC equivalent circuit to calculate AC voltage gain between the base and the collector. Base voltage is developed across the input resistor h_ie and

                                    v_B = h_iei_{B………(1)}

Collector voltage is the voltage drop across the collector resistor R_C :

              0-v_C=R_Ch_fei_B…….. (2)

  Substituting equation (1) in the equation (2),

              -v_C=R_Ch_fev_B/h_ie

Rearranging the terms on the both sides we obtain the amplifier voltage transfer function between the base and the collector as:

                      v_C/v_B= -h_feR_C/h_ie  

  The negative sign indicates that the voltage signal at the collector is 180° out of phase with voltage signal at the base. The input impedance for this amplifier circuit is the combination of R_B and h_ie, but usually R_B>>h_ie.Therefore the input impendence ultimately reduces to the resistance of the transistor itself, namely h_ie. Output impendence is the collector resistor R_C .operation of the common emitter amplifier in high frequency range is limited due to presence of capacitance between the collector and the base as it provides a path by which a large and inverted signal at the collector drives a negative feedback current into the base leading to base-to-collector voltage gain look like a low-pass filter. Of the three configurations common emitter configuration is the most preferred configuration. It has low input impedence, moderate output impedence, voltage and current gain. The input and output are often capacitively coupled.

    The following are noted from the figures 7 and 8:

• v=(R/R+R_S )v_i.
•  The coupling capacitance is treated as short circuit.
• The output voltage is:

                             v_o= -g_mR_Lr_ov/r_o+R_L= (-g_mR_Lro/r_o+R_L) (Rv_i/R+R_i)

• Voltage gain:

                A_V=vo/vi= (-g_mR_Lr_o/r_o+R_L)(R/R+R_S)

• Input impedence:

           Z_in= R₁R₂r_p/(R₁R₂+R₁R_p+R₂R_p)

• Current gain:

      A_i= I_L/I_i= (v_o/R_L)/(v_i/R_i+Rs)= [(Rs+R_i)/R_L]A_v

  COMMON EMITTER AMPLIFIER WITH EMITTER RESISTOR:(see figure 9)

A common emitter amplifier with emitter resistor (R_E) is often constructed as shown in the above circuit. Emitter resistor provides negative feedback, which is utilized to stabilize both the dc operating point and the ac gain. The transfer function across the transistor can be shown as:

         Vc/v_b= -A = -  (h_feR_C/h_ie+h_feR_E)

           If  h_feR_E>>h_ie

        Vc/v_b= -A= - (h_feR_C/h_feR_E)= -R_C/R_E

i.e gain is independent of hybrid parameters. This result is valid even for large amplitude signal because it is unaffected by variations in the hybrid parameters. The input impedence is:

        R_in=h_feR_E

h_ie is small, hence it is usually neglected when emitter impedence is more than a few hundred ohms. For small input signals it is desirable to have large voltage gain for basic CE amplifier even if an emitter resistor is used for dc stability. This can be achieved through bypassing emitter resistor with a large capacitance CE which shorts out RE for AC signals. The magnitude of resulting transfer function is similar to a high pass filter with RE setting the gain at low frequencies (A=R_C/R_E) and capacitor maximizing the gain at high frequencies (A=h_feR_C/h_ie).

  DC BIASING: (see figure 10)

 It is setting up a circuit for a transistor to operate at a desired operating point on its characteristic curve. Three DC bias circuits for common emitter amplifier are shown below.

        The fig (a) shows a circuit in which the only path for DC bias current into the base is through R_B .v_CC   is a power supply voltage, which is generally greater than 10 volts. The DC voltage at the collector should be able to provide at least a voltage drop of 2 volts between the collector and the emitter and must be clearly less than v_CC . In the case of absence of other circuit requirements a choice for v_C is Vcc/2.dc analysis leads to the following result:

                           R_B=2h_FER_C

  Though the working of circuit is good, the variation in the value of h_FE in various samples results in a bad design. A well designed circuit should have an operating point that is less dependent on h_FE.

         The fig (b) shows a base-biasing resistor is connected to the collector instead of vCC and RF acts as a negative feedback resistor. Analysis leads to the result

                                             R_F=h_FER_C

Hence the change in h_FE has only half the effect of design of fig (a). A series resistor is employed between emitter and ground for a more common bias stabilization technique. In fig (c) further improvement is shown by introducing a second base-bias resistor. Bias voltage is almost entirely determined by the both bias resistors. These biasing methods can also be adopted for CB, CC configurations.   

COMMON BASE AMPLIFIER:(see figure 11)

It is also known as the grounded base amplifier. It cannot produce current gain between the input and output signals. It has a very small input impedence and output impedence like the CE amplifier. Stray capacitance of the transistor is less significant compared to that of the CE amplifier as the input and output currents are similar. It is used in high frequency applications because it provides voltage gain higher than the other configurations. In the figure the capacitor between the base and the ground provides an effective AC ground at the transistors base.

         Voltage gain, A_v=v_C/v_E= h_feR_C/h_ie

          Input impedence ,Z_in=h_ie/h_fe is quite small.

          Output impedence ,Z_out is never greater than R_C.

  This circuit is used to receive high frequency signals transmitted via a co-axial cable due to high-frequency response and small input impedence. For this purpose input impedence of the amplifier is adjusted to be usually in the range 50-75 ohms.

  COMMON COLLECTOR AMPLIFIER: (see figure 12)

  It is called emitter follower amplifier because the output voltage signal at the emitter is approximately equal to the input voltage signal at the base. Voltage gain is less than unity but current gain is large. The amplifier has large input impedence and a small output impedence and hence used to match high-impedence source to a low-impedence load.

       A_v= v_E/v_B = h_feR_E/(h_ie + h_feR_E)

The gain is in phase and slightly less than unity. Output impedence of CC amplifier can be much lesser than the output impedence of the driving signal source.

  Operating characteristics of CE, CB, CC configurations are shown in figure 13.

  SMALL SIGNAL MODEL: (see figure 14)

    i_C=h_FEi_B

The above relation gives a simple transistor model. A more general model for describing the family of characteristic curves is given by

                          i_C=i_C(i_B,v_CE)

  where i_C is a transistor dependent function. In general current and voltage signals have both DC and AC components. The time derivations involve only the AC component and we can obtain the hybrid equations :

                       i_C=h_feI_B+h_oev_CE

                                v_BE=h_ieI_B+h_rev_CE   

The typical values for hybrid parameters are given below:

     Forward current ratio, h_fe=10^2

     Input impedence, h_ie =2*10^3

    Output impedence, h_oe=2*10^-6 mhos

   Reverse voltage ratio, h_re=10^4

As an illustration the relationship between voltages and currents for a transistor in CE configuration is given below:

         v_BE= v_B-v_E

         v_CE=v_C-v_E

  TRANSCONDUCTANCE MODEL:

 This model provides us with an alternate description of transistor operation. The forward conductance is defined as:

                     g_m= h_fe/h_ie  

Using the perfect transistor model,

          i_C=g_m(v_B-v_E)=g_mv_BE

Since the transconductance is used to describe the field effect transistors it is sometimes convenient to apply the same parameters to bipolar junction transistor.

  IDEAL AND PERFECT BIPOLAR TRANSISTOR MODELS:

We can obtain a simplified AC model for the transistor (perfect transistor) that is independent of circuit configuration by ignoring h_oe and h_re

                    i_C=h_fei_{B……………….(1)}

                   v_BE=h_iei_{B……………..(2)}

i_C is typically hundred times larger than i_B leading to the approximation i_E@i_C. for an ideal transistor h_ie=0 and hence v_B=v_E. When effects of hie cannot be ignored we can use the perfect transistor model described by the equations (1) and (2). For circuit diagram hie can be added directly to the ideal transistor symbol.

  The characteristics of a perfect amplifier are:

1.Infinite input impedence

2.Zero output impedence

3.Infinite voltage gain and current gain

4.Stable and linear

  IDEAL AMPLIFIER APPROXIMATION FOR BIPOLAR JUNCTION TRANSISTOR:

An operational amplifier to a good extent obeys the following properties:

1.Large forward transfer function

2.Virtually non-existent reverse transfer function

3.Large input impedence

4.Small input impedence

5.Wide bandwidth

6.Infinite gain

  Working rules for ideal transistor model:

1.The base and the emitter are at the same AC voltage.

2.collector current is equal to emitter current and is proportional to base current.

JUNCTION FIELD EFFECT TRANSISTOR:

The common transistor is called a junction transistor, which led to the solid-state electronics revolution, though having drawbacks like low input impedence during application because base of the transistor is signal input and base emitter diode is reverse biased. The device which achieved transistor action with reverse-biased input diode junction came to be known as “Field effect transistor” or a ‘Junction field effect transistor”. Due to reverse biased junction it has high input impedence and minimizes the interference with the signal source when a measurement is made.

                                                   Bipolar junction transistors have low input impedence, small high frequency gain. They are non-linear when collector-to- emitter voltage is less than 2 volts. The forward-biased junction restricts the input impedence. Due to the main carriers passage through region where majority carriers are of opposite polarity might arise. Junction field effect transistor overcomes some of the problems faced by bipolar junction transistor. There are two types of junction field effect transistor: (see figure 15).

1. N-channel
2. P-channel

Since the channel is formed from a unipolar material, its resistance is a function only of the conducting volume and the conductivity of the material. JFET operates with all pn junctions reverse-biased to obtain high input impedence into the gate. If the channel has a uniform concentration of impurities and the gate is placed in middle of the channel, the FET is said to be symmetrical. In symmetrical FETs the source and the drain are interchangeable which can be useful in some applications. But many FETs are deliberately constructed unsymmetrically so as to enhance certain parameters and behaviour. JFET has got a small leakage current which could be a drawback for certain applications.

 WORKING: (see figure 16)

  The shaded regions in the figure are composed of p-type material with the bar being constructed from an n-type material for an n-channel FET. The n-type material acts as a resistor between the source and the drain. The current flow is due to electrons (majority carriers for n-type material). The input impedence for JFET is extremely high due to the reverse biased gate junction and lack of contribution of minority carriers to the flow through the device. Modulating the gate voltage can modulate current flow through the device. JFET can be controlled by depleting charge carriers from the n-channel. This is done by making gate more negative and it reduces the current flow for a given value of source to drain voltage.

  CHARACTERISTIC CURVES: (see figure 17)

  Here the common source JFET is considered for sake of convenience. From the curves we can infer that for a given value of gate voltage, the current is nearly constant over a wide range of source to drain voltages.  

The transfer curve is useful for identifying the region of linearity and for visualizing gain from the device. The gain is proportional to the slope of the transfer curve. The current value I_DSS represents the value of maximum current from the device, when the gate is shorted to ground. The gate voltage at which the current reaches zero is called the pinch voltage (V_P). The dashed line is a representation of gain in the linear region of operation and strikes zero current line at about half the pinch voltage.

  PRINCIPLES OF OPERATION: (see figure 18)

  The figure shows an n-channel JFET with DC bias voltage applied. As the reverse bias across pn junction is increased the depletion region grows, reducing the conducting n-channel material thereby increasing the resistance of the channel. The major current I_D is caused by applied voltage V_DS and is controlled by applied voltage V_GS. JFET has two modes of operation:

1.Variable resistance mode:

Here JFET behaves like a resistor controlled by VGS.

  2.Pinch-off mode:

Most of the drain-source voltage drop occurs along the constricted n-channel and hence JFET acts like a high-resistance resistor near the depletion regions.

             The characteristic curves of typical JFET are seen in the figure 19. The variable resistance region of the graph shows a linear relationship between V_DS and I_D at small values of V_DS and constant value of V_GS.

                            The pinch-off region of the graph gives various values of V_GS for nearly a constant value of I_D as V_DS increases. In this region JFET can be used as a linear voltage and current amplifier. If V_GS becomes zero the maximum value of current is denoted by I_DSS with the gate shorted to the source. If V_GS becomes positive, JFET acts like a forward biased diode, since the pn junction becomes conducting

  SMALL SIGNAL AC MODEL:

  JFET characteristic curves are described by the equation of the form

                       I_D=I_D (V_GS, V_DS)

with the function varying with a particular transistor. The above relationship gives the AC relationship:

              I_D=(¶I_D/¶V_GS)V_GS+(¶I_D/¶V_DS)V_DS

  In pinch-off region curves of constant V_GS are flat and the above equation reduces to

                    I_D=g_mV_GS

  Where g_m=¶I_D/¶V_GS     and         ¶I_D/¶V_DS=0

  JFET COMMON DRAIN AMPLIFIER (source follower):

  Common drain FET amplifier is similar to CC configuration of bipolar junction transistor.

       The figure 20 shows a self-biased common drain JFET amplifier. It is characterized by voltage gain less than unity and a large current gain as a result of having a very large input impedence and a small output impedence. Applying AC circuit analysis:

           I_D=g_mV_GS

           V_S/R_S=g_m(V_G-V_S)

Voltage gain between gate and source is:

           V_S/V_G=g_mR_S/1+g_mR_S

We would have a voltage follower if

         g_mR_S>>1, V_S=V_G

  JFET COMMON SOURCE AMPLIFIER: (see fig 21)

It is similar to CE configuration of bipolar junction transistor. It can provide both voltage and current gain. FET amplifiers are most useful with high output impedence signal sources where a large current gain is primary requirement as the input resistance into the gate is very large and the current gain can be quite large due to this fact. The source by-pass capacitor provides a low impedence path to ground for high frequency components of V_DS and therefore AC signals will not cause a swing in bias voltage. Due to small gate current, we obtain the approximations

               I_S=I_D

              V_S= - V_GS

The source is positive with respect to the gate for reverse bias. At low frequencies the capacitor can be ignored and the source voltage is

                    V_S=R_SI_S=R_SI_D

  Using transconductance equation ,

                 V_S=g_mR_SV_G/1+g_mR_S

  Using the approximation I_S=I_D we obtain,

       V_D= - V_SR_D/R_S

  Therefore voltage gain is:

      V_D/V_G= -A = - g_mR_D/1+g_mR_S

  If g_mR_S>>1, then V_D/V_G = -A = - R_D/R_S

  ADVANTAGES OF JFET:

1.They are controlled by the applied gate voltage, they draw no gate current and hence present a very high input resistance to any signal source.

2.The reverse-biased junctions can tolerate a considerable amount of radiation damage without any appreciable change in FET operation. Thus JFETs are an excellent choice for operation in high-radiation environment.

INTRODUCTION TO METAL OXIDE SILICON FIELD EFFECT TRANSISTOR:

The name was given to field effect transistors because a weak electrical signal coming in through one electrode creates an electric field through rest of the transistor. The field modulates the second current to mimic the first one but it can be substantially large.

CONSTRUCTION:

  The structure of mosfet is as shown in the figure 22. Instead of seeing the conventional construction let us go for an advanced method for construction, which is described as follows:

This method was invented by Shin, Hyung s. (seoul, kr) and was published on December 14,1993.An oxide layer is grown on the overall exposed surface of a substrate, which then has a trench, formed by an etching process. To form a gate region of predetermined thickness, a poly-silicon layer is deposited on the trench substrate, by using a nitride layer formed on the substrate as a mask. Then, the nitride layer is removed. The exposed portion of the silicon substrate disposed at opposite sides of the gate electrode is subjected to a high concentration n-type ion injection. Ultimately an epitaxial layer is grown using the high concentration n-type ions as seeds, to form high concentration drain and source regions.    

  The advantage of the above method is that it is possible to reduce the capacitance at junctions between gate and drain regions and between drain and source regions and the overall size of the produced semiconductor chip. The doping compensation effect can be decreased, because the p-type ion doped channel of the trenched silicon substrate is isolated from low concentrated n-type ion doped region.

WORKING: (see figure 23)

Bipolar transistor is a current controlled device while field effect transistors are voltage controlled devices, which means that output current is controlled by voltage. A field effect transistor consists of a bar of material with a metal contact at each end. One end is called the source another the drain. Gate is the third terminal.

Depletion layer is a region between the n-type material and the p-type material. If gate is made more negative the depletion layer gets wider and the channel gets narrower which reduces the current. If the gate is made less negative the reverse action takes place. Field effect transistor is called so because it depends on the electric field, which is altered by changing the depletion layer by altering the voltage.

The general structure of MOSFET is different to that of JFET. The MOSFET illustrated  is n-MOS (see figure 24) which means that the electrons are the majority carriers. The n-type material is surrounded by a thin layer of silicon oxide on one side and p-type material on the other side. Since the electron flow is in the opposite direction to the conventional current, the electrons travel from source to drain. This is achieved applying negative voltage with respect to the gate. The opposite is obtained by applying positive voltage with respect to the gate.

 Enhancement mode refers to the increase in width of n-channel and depletion mode to the narrowing down of the n-channel. MOSFETs are available in both p-channel and n-channel type, with each type available in both enhancement and depletion mode.

The figure 25 above shows the action of an n-channel enhancement mode MOSFET. It allows us to obtain the graph (see figure 26)

From the graph we can infer that:

Drain source voltage is fixed.

From a threshold voltage of 2 volts, the drain current increases linearly with gate source voltage.

Gain of any FET is measured by its transconductance, which can be found by working out the gradient of the graph.

  Operation principle of MOS transistors with an insulated gate electrode is based on the control of a conducting channel at or near the interface between the semiconductor and the oxide. Depletion type has some special applications and Enhancement type is important for discrete and integrated circuits, which combined together are useful in integrated CMOS IC.

  GENERAL CHARACTERISTICS OF MOSFET:

Transconductance is about 1 to 10 milliamperes per volt.

Input resistance is very high, about the order 10^12 ohms.

The output resistance value depends on the type. For a signal Mosfet the range is 10 to 50 kW while the range of a power Mosfet is lower.

  APPLICATIONS:

As they can be made very compact, they are used in integrated circuits.

They are used in hi-fi power amplifiers in complimentary pairs as they produce less distortion due to their linearity.

In high power devices, since they give large current output for a very tiny current.